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general description the MAX7387/max7388 replace ceramic resonators, crystals, and supervisory functions for microcontrollers in 3.3v and 5v applications. the MAX7387/max7388 provide a clock source together with integrated reset, watchdog, and power-fail func- tions. the watchdog timer is pin programmable and provides watchdog timeout values in the 16ms to 2048ms range. the power-fail output provides early warning of power failure. the power-fail threshold on the max7388 is internally set. the MAX7387 also provides a separate watchdog output that is used as a status indicator or to control safety-critical system elements. the MAX7387/max7388 clock outputs are factory pro- grammed to a frequency in the 1mhz to 16mhz range. four st andard frequencies are available. other frequen- cies are available upon request. the maximum operating supply current is 5.5ma (max) with a clock frequency of 12mhz. unlike typical crystal and ceramic resonator oscillator circuits, the MAX7387/max7388 are resistant to emi and vibration, and operate reliably at high tempera- tures. the high-output drive current and absence of high-impedance nodes make the oscillator invulnerable to dirty or humid operating conditions. the MAX7387/max7388 are available in 10-pin and 8-pin ?ax packages, respectively. the MAX7387/max7388 standard operating temperature range is from -40? to +125?. applications white goods handheld products automotive portable equipment appliances and controls microcontroller systems features ? robust microcontroller clock and supervisor in a single package ? integrated reset, watchdog, and power-fail functions ? pin-programmable watchdog timeout ? +2.7v to +5.5v operation ? factory-trimmed oscillator ? reset valid down to 1.1v supply voltage ? ?0ma clock-output drive current ? ?% total accuracy for -40? to +125? ? ?.75% total accuracy for 0? to +85? ? -40? to +125? temperature range ? 8- and 10-pin ?ax surface-mount packages ? 5.5ma operating current (12mhz) ? 1mhz to 16mhz factory preset frequency MAX7387/max7388 system monitoring oscillator with watchdog and power fail ________________________________________________________________ maxim integrated products 1 19-3896; rev 1; 1/06 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. wdi pfo gnd 1 2 8 7 clock rst/rst wds1 wds2 v cc top view 3 4 6 5 max7388 max pin configurations ordering information part temp range pin-package pkg code MAX7387 srff -40 o c to +125 o c 10 ?ax u10-2 max7388 srff -40 o c to +125 o c 8 ?ax u8-1 note: ??is a placeholder for the reset output type. insert the symbol found in table 3 in the place of ?.???is a placeholder for the power-on reset (por) voltage. insert the symbol found in table 2 in the place of ?.??f?is a placeholder for the nominal output frequency. insert the symbol found in table 4 in the place of ?f.?for example, MAX7387cmtp describes a device with 4.38v reset level, open-collector rst output, and a clock output frequency of 8mhz. typical application circuit, functional diagram, and selector guide appear at end of data sheet. ?ax is a registered trademark of maxim integrated products, inc. 1 2 3 4 5 10 9 8 7 6 clock rst/rst wdi pfo wds2 wds1 v cc pfi MAX7387 top view max wdo gnd
MAX7387/max7388 system monitoring oscillator with watchdog and power fail 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc to gnd ...........................................................-0.3v to +6.0v all other pins to gnd ................................-0.3v to (v cc + 0.3v) clock, pfo output current, rst/ rst , wdo.................?0ma continuous power dissipation (t a = +70?) 10-pin ?ax (derate 5.6mw/? over +70?) ..............444mw 8-pin ?ax (derate 4.5mw/? over +70?) ................362mw operating temperature range .........................-40? to +125? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? electrical characteristics ( typical application circuit , v cc = +2.7v to +5.5v, t a = -40? to +125?, 1mhz to 16mhz output frequency range, typical values at v cc = +5.0v, t a = +25?, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units power requirements operating supply voltage v cc 2.7 5.5 v t a = 0 c to +85 c 1.1 valid rst/ rst supply voltage v ccr t a = -40 c to +125 c 1.18 v f clock = 12mhz 5.5 operating supply current i cc f clock = 8mhz 4.5 ma tri-level analog inputs: wds1, wds2 input-high voltage level v c c - 0.55v v input-middle voltage level 0.9 v cc - 1.1v v input-low voltage level 0.45 v logic input: wdi input leakage current i leak input high 0.5 ? logic-input high voltage v ih 0.7 x v cc v logic-input low voltage v il 0.3 x v cc v push-pull logic outputs: rst/ rst output high v oh i source = 1ma v cc - 1.5 v output low v ol i sink = 3ma 0.05 0.4 v open-drain logic outputs: rst , pfo , wdo output low v olo i sink = 3ma 0.05 0.4 v output: clock output high voltage v ohc i source = 5ma v cc - 0.3 v output low voltage v olc i sink = 5ma 0.3 v t a = 0 c to +85 c, v cc = 5.0v -2.75 +2.75 clock accuracy f clock t a = -40 c to +125 c, v cc = 5.0v -4 +4 % clock frequency temperature coefficient v cc = 5.0v (note 2) 140 400 ppm/? clock frequency supply voltage coefficient t a = +25? (note 2) 0.67 1 %/v clock duty cycle (note 2) 45 50 55 %
MAX7387/max7388 system monitoring oscillator with watchdog and power fail _______________________________________________________________________________________ 3 electrical characteristics (continued) ( typical application circuit , v cc = +2.7v to +5.5v, t a = -40? to +125?, 1mhz to 16mhz output frequency range, typical values at v cc = +5.0v, t a = +25?, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units clock output jitter observation for 20s using a 500mhz oscilloscope 310 ps rms output rise time t r c l oa d = 10p f, 10% to 90% of ful l scal e ( n ote 2) 2.5 7.0 ns output fall time t f c l oa d = 10p f, 90% to 10% of ful l scal e ( n ote 2) 2.8 7.5 ns internal power-on reset t a = +25? v th - 1.5% v th + 1.5% v th+ v cc rising, table 2 t a = -40? to +125? v th - 2.5% v th + 2.5% reset voltage v th- v cc falling 0.98 x v th+ v reset timeout period t rst figures 1, 2 86 135 250 ? watchdog wds1 = gnd, wds2 = gnd 11 16 22 wds1 = open, wds2 = gnd 22 32 44 wds1 = v cc , wds2 = gnd 44 64 88 wds1 = gnd, wds2 = open 88 128 177 wds1 = open, wds2 = open 177 256 354 wds1 = v cc , wds2 = open 354 512 708 wds1 = gnd, wds2 = v cc 708 1024 1416 wds1 = open, wds2 = v cc 1416 2048 2832 ms watchdog timeout period (figure 2) t wdg w d s 1 = w d s 2 = v c c ( w atchd og d i sab l ed ) power fail power-fail select threshold v sel pfi input 0.65 x v cc 0.85 x v cc v v cc monitoring threshold (internal threshold) v ith v cc rising 4.06 4.38 4.60 v internal threshold hysteresis v ihyst v cc falling 1.0 2 4.0 %v ith pfi monitoring threshold (external threshold) v eth pfi rising 0.9 1.1 1.4 v external threshold hysteresis v ehyst pfi falling 1.0 3.5 8.0 %v eth note 1: all parameters are tested at t a = +25?. specifications over temperature are guaranteed by design. note 2: guaranteed by design. not production tested.
MAX7387/max7388 system monitoring oscillator with watchdog and power fail 4 _______________________________________________________________________________________ frequency vs. supply voltage MAX7387/88 toc01 v cc (v) normalized frequency 4.85 4.20 3.55 0.990 1.000 1.010 1.020 0.980 2.90 5.50 normalized to v cc = +5v v th+ = +2.9v frequency vs. temperature MAX7387/88 toc02 temperature ( c) normalized frequency 110 95 80 65 50 35 20 5 -10 -25 0.990 1.000 1.010 1.020 1.030 1.040 0.980 -40 125 normalized to t a = +25 c duty cycle vs. supply voltage MAX7387/88 toc03 v cc (v) duty cycle (%) 4.85 4.20 3.55 49 50 51 52 48 2.90 5.50 v th+ = +2.9v typical operating characteristics ( typical application circuit , v cc = +5v, t a = +25?, unless otherwise noted.) duty cycle vs. temperature MAX7387/88 toc04 duty cycle (%) 49 50 51 52 48 temperature ( c) 110 95 80 65 50 35 20 5 -10 -25 -40 125 clock output waveform with c l = 10pf MAX7387/88 toc05 40ns/div clock 1v/div v cc = +3.3v clock output waveform with c l = 50pf MAX7387/88 toc06 40ns/div clock 1v/div v cc = +3.3v clock output waveform with c l = 100pf MAX7387/88 toc07 40ns/div clock 1v/div supply current vs. temperature MAX7387/88 toc08 i cc (ma) 2 3 4 5 1 temperature ( c) 110 95 80 65 50 35 20 5 -10 -25 -40 125 v cc = 5v v cc = 3.3v supply current vs. supply voltage MAX7387/88 toc09 v cc (v) i cc (ma) 4.85 4.20 3.55 2 3 4 5 1 2.90 5.50 v th+ = 2.9v
MAX7387/max7388 system monitoring oscillator with watchdog and power fail _______________________________________________________________________________________ 5 clock settling time from start MAX7387/88 toc10 1 s/div clock 2v/div v cc 2v/div power-on reset behavior MAX7387/88 toc11 100 s/div clock 5v/div v cc 2v/div rst 5v/div pfo 5v/div t rst pfi = v cc maximum v cc transient duration vs. reset threshold overdrive MAX7387/88 toc12 reset threshold overdrive (mv) transient duration ( s) 900 800 700 600 500 400 300 200 10 100 1000 1 100 1000 reset occurs above this curve v cc falling from v th+ + 100mv typical operating characteristics (continued) ( typical application circuit , v cc = +5v, t a = +25?, unless otherwise noted.) response of rst and wdo wdi exceeding t wdg MAX7387/88 toc13 2ms/div wdo 5v/div wdi 2v/div rst 5v/div t rst t wdg rising threshold vs. temperature MAX7387/88 toc14 temperature ( c) v th+ (v) 110 95 80 65 50 35 20 5 -10 -25 2.82 2.84 2.86 2.88 2.90 2.80 -40 125
detailed description the MAX7387/max7388 replace ceramic resonators, crystals, and supervisory functions for microcontrollers in 3.3v and 5v applications. the MAX7387/max7388 provide a clock source together with integrated reset, watchdog, and power-fail func- tions. the watchdog timer is pin programmable and pro- vides watchdog timeout values in the 16ms to 2048ms range. the power-fail output provides early warning of power failure. the power-fail threshold on the max7388 is internally set. the MAX7387 features a programmable power-fail threshold, which is configurable to detect either an external voltage or the v cc supply voltage to the device. the MAX7387 also provides a separate watchdog output that is used as a status indicator or to control safety-critical system elements. the integrated reset and watchdog functions provide the power-supply monitoring functions necessary to ensure correct microcontroller operation. the reset cir- cuit has built-in power-supply transient immunity and provides both power-on reset and power-fail or brownout reset functionality. two standard factory- trimmed reset levels are available. the watchdog timer is programmable to eight individual timeout values and may be disabled for test purposes. a power-fail function is provided for power-supply volt- age monitoring and can provide advance notice of an impending power failure. parts with power-fail input (MAX7387) monitor external power-supply voltages through an external resistive divider. connect pfi to v cc to monitor v cc . MAX7387/max7388 system monitoring oscillator with watchdog and power fail 6 _______________________________________________________________________________________ pin MAX7387 max7388 name function 1 ? pfi power-fail input. pfi monitors the condition of either an external supplied voltage or v cc . see the power fail section for more details. 21v cc power input. connect v cc to the power supply. bypass v cc to gnd with a 1? capacitor. install the bypass capacitor as close to the device as possible. 3 2 wds1 watchdog timeout select input 1. connect wds1 and wds2 to v cc , gnd, or v cc /2, as shown in table 1, to set the watchdog timeout period. 4 3 wds2 watchdog timeout select input 2. connect wds2 and wds1 to v cc , gnd, or v cc /2, as shown in table 1, to set the watchdog timeout period. 5 4 gnd ground 6 ? wdo watchdog output. open-drain watchdog output asserts low if wdi is not toggled within the watchdog timeout period. 75 pfo power-fail output. open-drain output asserts when the voltage being monitored drops below the power-fail threshold voltage. 8 6 wdi watchdog input. a rising edge on wdi resets the watchdog timer. if wdi does not receive a rising edge within the watchdog timeout period (t wdg ), rst/ rst asserts. the watchdog timeout period is programmable through wds1 and wds2. connect wds1 and wds2 to v cc to disable watchdog timer. 9 7 rst/ rst reset output. reset output is available in one of three configurations: push-pull rst, push-pull rst , or open-drain rst . the reset output occurs if any combination of the following conditions occurs: reset output is asserted during power-up and whenever v cc is below the reset threshold level; for devices with wdi, reset output asserts when wdi does not receive a rising edge within the watchdog timeout period. 10 8 clock clock output pin description
5 4 3 2 1 clk t rst v th+ v ith v th- v ccr v ith - v ihyst rst pfo clock starts on internal por (v th+ , v cc rising) rst releases after the reset timeout period v cc (v) pfo asserts as v cc drops below v ith - v ihyst rst continues to assert until v ccr rst asserts on reset falling voltage (v th- , v cc falling); clock stops figure 1. rst/ rst and pfo behavior during power-up and brownout MAX7387/max7388 system monitoring oscillator with watchdog and power fail _______________________________________________________________________________________ 7 clock output (clock) the push-pull clock output (clock) drives a ground- connected 1k ? load or a positive supply connected 500 ? load to within 300mv of either supply rail. clock remains stable over the full operating voltage range and does not generate short output cycles during either power-on or power-off. a typical startup characteristic is shown in the typical operating characteristics section. reset the reset function drives the microcontroller reset input to prevent operation in the cases of the initial power-on setting, low power-supply voltages, and the failed watchdog operations. three reset output versions are available: push-pull rst, push-pull rst , and open-drain rst . the reset timeout period (t rst ) is nominally 135s. power-on reset (por) the internal power-on reset (por) circuit detects the power-supply voltage (v cc ) level at startup. the por circuit starts the oscillator when v cc exceeds the reset rising threshold level (v th+ ). the reset output remains asserted from the time v cc crosses the v th+ and con- tinues to be asserted for the reset timeout period (t rst ). upon completion of the reset timeout, the reset output is released. see figure 1. low-voltage lockout the reset output asserts whenever v cc drops below the reset falling threshold, v th- . the difference between the reset rising and falling threshold values is v th+ - (v th- ). the nominal hysteresis value is 2% of the reset rising threshold value. the reset detection circuitry provides filtering to prevent triggering on negative voltage spikes. see the typical operating characteristics for a plot of maximum transient duration without causing a reset pulse vs. reset comparator overdrive. figure 1 shows the reset output (rst/ rst ) behavior during power-up and brownout. watchdog the watchdog function provides microprocessor moni- toring by requiring the microprocessor to toggle an out- put pin to indicate correct operation. the wdi input monitors the port signal and resets the watchdog timer on receipt of a rising edge. if an edge is not received within the required watchdog timeout period, the watch- dog circuit initiates a reset cycle. the internal watchdog
v cc clk rst internal watchdog state wdi wdo active tripped reset timeout period (t rst ) watchdog timeout period (t wdg ) figure 2. watchdog timing diagram MAX7387/max7388 system monitoring oscillator with watchdog and power fail 8 _______________________________________________________________________________________ circuits are reset and the watchdog timer restarts at the end of the reset cycle (rst/ rst output releases). for the MAX7387, the wdo output asserts if the wdi input does not receive a rising edge within the watchdog timeout period. wdo output remains asserted until a valid edge is received on the wdi input, signifying cor- rect microprocessor operation. the wdo output can be used as a status indicator either to the microprocessor or to an external device, such as a fault-indicating led or sounder. the wdo output is an open-drain output. the power-up condition of the wdo output is high (not asserted). the operation of the watchdog and reset function is illustrated in figure 2. the watchdog timeout period is set to one of nine possible values by pin strapping wds1 and wds2. each control input has three possible values assigned by connection to gnd, v cc , or v cc /2 (see table 1). one of the assigned values disables the watchdog function and is intended for customer use during test. the watchdog timer is disabled while the rst/ rst output is asserted. power fail max7388 power fail the power-fail function provides early warning of a power failure. the power-fail comparator threshold is internally set to 4.38v v cc rising threshold (v ith ). the open-drain pfo asserts low if the v cc supply voltage drops below the v cc falling threshold value. the v cc falling threshold is nominally 2% below the v cc rising threshold. MAX7387 power fail internal (v cc ) detection is configured by connecting pfi to v cc . the internal v cc rising threshold (v ith ) is set at 4.38v. the open-drain pfo asserts low if the v cc supply voltage drops below the v cc falling threshold value (v hyst ). the v cc falling threshold is nominally 2% below the v cc rising threshold. applications information interfacing to a microcontroller clock input the clock output is a push-pull, cmos logic output, which directly drives any microprocessor (?) or micro- controller (?) clock input. there are no impedance- table 1. watchdog timeout periods watchdog timeout period (ms) wds1 wds2 min typ max gnd gnd 11 16 22 v cc /2 = open gnd 22 32 44 v cc gnd 44 64 88 gnd v cc /2 = open 88 128 177 v cc /2 = open v cc /2 = open 177 256 354 v cc v cc /2 = open 354 512 708 gnd v cc 708 1024 1416 v cc /2 = open v cc 1416 2048 2832 v cc v cc disabled note: wds1 or wds2 is pulled to open if left floating.
MAX7387/max7388 system monitoring oscillator with watchdog and power fail _______________________________________________________________________________________ 9 matching issues when using the MAX7387/max7388. operate the MAX7387/max7388 and microcontroller (or other clock input device) from the same supply volt- age level. refer to the microcontroller data sheet for clock-input compatibility with external clock signals. the MAX7387/max7388 require no biasing compo- nents or load capacitance. when using the MAX7387/ max7388 to retrofit a crystal oscillator, remove all bias- ing components from the oscillator input. power-supply consideration the MAX7387/max7388 operate with power-supply voltages in the 2.7v to 5.5v range. power-supply decoupling is needed to maintain the power-supply rejection performance of the MAX7387/max7388. bypass v cc to gnd with a 0.1? surface-mount ceramic capacitor. mount the bypass capacitor as close to the device as possible. if possible, mount the MAX7387 /max7388 close to the microcontroller? decoupling capacitor so that additional decoupling is not required. a larger-value bypass capacitor is recommended if the MAX7387/max7388 are to operate with a large capacitive load. use a bypass capacitor value of at least 1000 times that of the output load capacitance. output jitter the MAX7387/max7388s?jitter performance is given in the electrical characteristics table as a peak-to-peak value obtained by observing the output of the device for 20s with a 500mhz oscilloscope. jitter measurements are approximately proportional to the period of the out- put frequency of the device. thus, a 4mhz part has approximately twice the jitter value of an 8mhz part. the jitter performance of all clock sources degrades in the presence of mechanical and electrical interference. the MAX7387/max7388 are immune to vibration, shock, and emi influences, and thus provide a consid- erably more robust clock source than crystal- or ceram- ic-resonator-based oscillator circuits. table 2. por voltage power-on reset voltage (v th ) r 4.38 m 3.96 j 3.44 n 3.34 p 3.13 q 2.89 s 2.82 v 2.5 x table 3. reset output type output type s push-pull rst a push-pull rst b open-drain rst c table 4. clock output frequency clock frequency (f clock ) (mhz) ff 4rd 8tp 12 vb 16 wb note: contact factory for other frequencies. note: standard values are shown in bold. contact factory for other por voltages. note: other versions with different features are available. refer to the max7389/max7390 and max7391 data sheets. part frequency range ( mhz ) reset function watchdog input (wdi)/ watchdog output ( wdo ) power-fail input ( pfi ) / power-fail output ( pfo ) speed pin- package MAX7387 1 to 16 yes yes/yes yes/yes 10 ?ax max7388 1 to 16 yes yes/no no/yes 8 ?ax max7389 1 to 16 yes yes/yes 8 ?ax max7390 1 to 16 yes yes/no yes 8 ?ax max7391 1 to 16 yes yes/yes yes 8 ?ax note: standard values are shown in bold. contact factory for other output types. selector guide
MAX7387/max7388 system monitoring oscillator with watchdog and power fail 10 ______________________________________________________________________________________ MAX7387 max7388 rst/rst v cc gnd pfo wds1 r1 power supply 5v r2 wds2 pfi* *MAX7387 only wdi wdo* clock int rst/rst i/o port c i/o port osc1 dc-dc typical application circuit chip information process: bicmos MAX7387 max7388 reset timer rst/rst clock wdi wds1 wds2 pfi* *MAX7387 only wdo* pfo n prescaler watchdog timer internal (v cc detection) oscillator v_th gnd power-on reset n functional diagram
MAX7387/max7388 system monitoring oscillator with watchdog and power fail ______________________________________________________________________________________ 11 package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 8lumaxd.eps package outline, 8l umax/usop 1 1 21-0036 j rev. document control no. approval proprietary information title: max 0.043 0.006 0.014 0.120 0.120 0.198 0.026 0.007 0.037 0.0207 bsc 0.0256 bsc a2 a1 c e b a l front view side view e h 0.60.1 0.60.1 ?0.500.1 1 top view d 8 a2 0.030 bottom view 1 6 s b l h e d e c 0 0.010 0.116 0.116 0.188 0.016 0.005 8 4x s inches - a1 a min 0.002 0.95 0.75 0.5250 bsc 0.25 0.36 2.95 3.05 2.95 3.05 4.78 0.41 0.65 bsc 5.03 0.66 6 0 0.13 0.18 max min millimeters -1.10 0.05 0.15 dim
MAX7387/max7388 system monitoring oscillator with watchdog and power fail maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2006 maxim integrated products printed usa is a registered trademark of maxim integrated products, inc. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 10lumax.eps package outline, 10l umax/usop 1 1 21-0061 rev. document control no. approval proprietary information title: top view front view 1 0.498 ref 0.0196 ref s 6 side view bottom view 0 0 6 0.037 ref 0.0078 max 0.006 0.043 0.118 0.120 0.199 0.0275 0.118 0.0106 0.120 0.0197 bsc inches 1 10 l1 0.0035 0.007 e c b 0.187 0.0157 0.114 h l e2 dim 0.116 0.114 0.116 0.002 d2 e1 a1 d1 min - a 0.940 ref 0.500 bsc 0.090 0.177 4.75 2.89 0.40 0.200 0.270 5.05 0.70 3.00 millimeters 0.05 2.89 2.95 2.95 - min 3.00 3.05 0.15 3.05 max 1.10 10 0.60.1 0.60.1 ? 0.500.1 h 4x s e d2 d1 b a2 a e2 e1 l l1 c gage plane a2 0.030 0.037 0.75 0.95 a1

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